Loading Events

« All Events

  • This event has passed.

Progress in Polarization Super Junction Devices in GaN

2017-03-09 @ 15:00 - 16:00

Location: Faculty Lounge, Elevator C, Floor 2, Electrum, Kista

Title: Progress in Polarization Super Junction Devices in GaN

Name: Shankar Ekkanath Madathil

Affiliation: Department of EEE, University of Sheffield, Solly Street, Sheffield, UK

Abstract

Transition from the conventional scheme of manufacturing circuits using discrete components to that of a fully integrated power system-on-chip is anticipated to be a prerequisite to take advantage of the high-frequency power switching benefits offered by GaN devices.  High slew rates, in the presence of parasitic inductance (device/package/circuit) can result in over-voltage transients, which can seriously impair the functionality of a GaN device. Even with the most innovative packaging approaches, a finite residual inductance is present. Monolithic integration of gate drive circuitry with power devices on a single technology platform is considered an ideal approach to minimize parasitic inductance in the circuitry and therefore enable stable high-frequency operation, efficiency and power densities unachievable by existing techniques. Monolithic integration in GaN has gained some attention over the last few years, but has been mostly restricted to low voltage operation. Development of CMOS logic and drive circuits is also essential and towards that end, there have been efforts on demonstration of GaN-based enhancement-mode p-channel and n-channel HFETs. An integrated approach can enable higher power switching frequency in circuits yielding significant reduction in the size of passive components. The fundamental requirement of a semiconductor technology platform that enables simultaneous development of a wide range of high voltage and low voltage devices in GaN as required for integration is served by the Polarisation Super Junction (PSJ) platform.

Recent reports on the performance of vertical devices fabricated on bulk GaN substrates have shown performance close to the theoretical limits. However, marginal improvement in performance over Silicon Carbide (SiC) and the high cost of bulk GaN substrates will make market adoption difficult. However, the scenario can be transformed by implementing super junction architectures in GaN that can then enable ultra-high efficiency and reduction in on-state losses by orders of magnitude, thus making the solution highly competitive. This will translate to substantial reduction in manufacturing costs (increased count of dies/wafer), power converter size and system-level costs. Unlike Si, a dopant based approach to realize a super-junction device in GaN is unrealistic and has not been attempted due to difficulties of controlled Mg activation for p-type doping. An innovative and viable approach to overcome these limitations using a vertical PSJ (VI-PSJ) concept will be presented. A reduction of almost two orders of magnitude in RON.A can be achieved using VI-PSJ structures for breakdown voltage of 1kV, which could extend to three orders of magnitude improvement for 10kV devices, in comparison to conventional SiC devices.

Bio

Prof Shankar Ekkanath Madathil @ EM Sankara Narayanan is a Royal Society Industry Fellow in Rolls-Royce since 2014 where he works on the systems impact of next generation power electronics technologies and was a Royal Academy of Engineering Chair in Power Electronics from 2007-2013. His team has proven world leading design-2-manufacture expertise in Silicon and GaN. Presently, his work is focused on ultra-high power density power conversion solutions, which ranges from materials to circuits and thermal management with a focus on effective use of high value materials and manufacturing techniques for aerospace applications, through direct support from Rolls-Royce. His notable scientific contributions include the Clustered IGBT concept in Silicon and Silicon Carbide; the first demonstration of 3 kV Intelligent Power Chip in Silicon, record low on-state resistance 100 V devices in Silicon. In the area of GaN, his team demonstrated for the first time the existence of 2 Dimensional Hole Gas in GaN/AlGaN heterostructures and thus the polarisation super-junction concept in GaN. Through this technology, he has demonstrated high performance lateral power devices such as diodes, transistors and bi-directional GaN switches on silicon, sapphire and SiC substrates. Powdec KK in Japan is presently exploiting this technology, under non-exclusive license, with discrete power devices primed for production release in 2017.  He has very extensive experience in the area of Power IC technologies in Silicon and he was the first person in the UK to set up the Power IC fabrication processes in Southampton University.   He is an editor of IEEE – TDMR, IEEE-TED and an associated editor of IET – PEL and holds 40 patents/applications and published in excess of 200 articles. Most recently, he has been invited to join the editorial team of the most prestigious Proceedings of the Royal Society A: Mathematical, Physical and Engineering Sciences. He is a director of Eco Semiconductor Limited, which owns the IP of the CIGBT, presently under development for manufacture in the Far-East.

Details

Date:
2017-03-09
Time:
15:00 - 16:00

Organizer

IEEE ED Chapter