The EDS Germany Chapter and NanoP proudly presents Rajiv Joshi from IBM, T. J. Watson Research Center, US for a Distinguished Lecture on “Memories from Storage to Computing”. The lecture will be held on 14th December 2022 at 12am Berlin time. The Distiguished Lecture will be held in hybrid format, on site (TH Mittelhessen, Wiesenstraße 14, 35390 Gießen, Building A10, Room 6.20) and via Zoom. Login information provided before the event and requires registration. Interest participants please register via IEEE vTools by the following link:

Volatile (VM) and nonvolatile memories (NVM) are key to the electronic industry. The growth is attributed to growing computing capabilities with Artificial Intelligence (AI) in smartwatches, laptops, and smartphones requiring compatible memory solutions. Besides, the rising integration of electronic components in vehicles is expected to create growth opportunities for SRAM/DRAM semiconductor memory industry players. Many of these memories are used in Advanced Driver-Assistance Systems (ADAS) and lighting control offers improved connectivity and high speed to vehicle systems. Moreover, several market players are offering automotive semiconductor memory chips in order to cater to high demand in the automotive industry. Based on such demand Semiconductor Research Corporation (SRC) decadal report outlines that The growth of memory demands will outstrip global silicon supply presenting opportunities for radically new memory and storage solutions.This is the driving force for this talk.An overview of the current VM, and NVM and their application from storage to various aspects of computing are highlighted.

The talk brings out a key metric for the robustness of memories. This metric consists of performance, functionality, power, area, and yield. Some examples of memories in advanced technology such as 7nm are given.

AI issues related to training, inference, and weightstorage are described.Training requires a large data set. Inference requires multiple accesses depending on the AI workload, and storage needs robust, low-power memory. These issuesrequire highenergy efficiency and throughput improvement for both edge and data-centric accelerators compared to GPUs used for convolutional neural (CNN) and Deep neural (DNN) networks.  Thiscreates huge challenges to system design in terms of computational speed and energy efficiency. It is difficult for the traditional von Neumann architecture to meet the requirements of heavily data-centric applications due to the separation of computation and storage. Long interconnect wires are needed to transfer the data between Arithmetic Logic Unit (ALU) to memory. They add significant RC delays and degrade processor performance.To resolve these bottlenecks a few approaches such as near-memory computing and in-memory computing (IMC) are described.The emergence of IMC is significant in circumventing the von Neumann bottleneck. The application of VM (SRAM) and NVM (ReRAM, PCM, FeRAM, etc) for IMC and the pros and cons of each technique are brought out. The talk covers memory solutions for CNN/DNNnetworks. applications at extremely low Vmin.

Rajiv Joshi Biography:
Dr. Rajiv V. Joshi is an IEEE Fellow, winner of the prestigious IEEE Daniel Noble award, and a key technical lead/Research Scientist at T. J. Watson research center, IBM. He received his B.Tech IIT (Bombay, India), M.S (MIT), and Dr. Eng. Sc. (Columbia University). He has led successfully predictive failure analytic techniques for yield prediction and also the technology-driven SRAM at IBM Server Group. His statistical techniques are tailored for machine learning and AI which are licensed and commercialized. He received 3 Outstanding Technical Achievement (OTAs), 3 highest Corporate Patent Portfolio awards for contributions in interconnect technologies, holds 68 invention plateaus, and has over 278 US patents covering front end and back end of the line processes and structures, volatile and non-volatile memories, Compute in Memory structures, machine learning algorithms and quantum computing and over 415 international patents. He has authored and co-authored over 220 papers and given over 60 invited/keynote talks and given several Seminars. He received the NY IP Law association“Inventor of the year” award in Feb 2020. He received an industrial pioneer award in 2014 from IEEE Circuits and Systems society. He received the Best Editor Award from the IEEE TVLSI journal. He is inducted into the New Jersey Inventor Hall of Fame in Aug 2014. He won the Mehboob Khan award two times from Semiconductor Research Corporation. He won several best paper awards from ISSCC 1992, ICCAD 2012, ISQED, and VMIC. He is a member of the IBM Academy of technology and a master inventor. He serves on the Board of Governors for IEEE CAS as an industrial liaison. He serves as an IEEE CAS Ambassador to India. He served as a Distinguished Lecturer for IEEE CAS, CEDA, and EDS society. He is an ISQED and World Technology Network fellow and distinguished alumnus of IIT Bombay.